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FAN1655 Datasheet - Fairchild Semiconductor

3A DDR Bus Termination Regulator

FAN1655 Features

* Sinks and sources 2.1A continuous, 3A peak 0 to +125°C operating temperature range 5mA Buffered VREFOUT = VDDQ/2 Load regulation: VTT = VREFOUT ± 40mV On-chip thermal limiting Low Cost SO-14, Power Enhanced eTSSOP or 8-pin 5x6mm MLP package

FAN1655 General Description

The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 includes a buffere.

FAN1655 Datasheet (88.75 KB)

Preview of FAN1655 PDF

Datasheet Details

Part number:

FAN1655

Manufacturer:

Fairchild Semiconductor

File Size:

88.75 KB

Description:

3a ddr bus termination regulator.

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FAN1655 DDR Bus Termination Regulator Fairchild Semiconductor

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