HD61200 Datasheet | Hitachi Semiconductor

Description The HD61200 is a column driver LSI for a largearea dot matrix LCD. It employs 1/32 or more duty cycle multiplexing method. It receives serial display data from a micro controller or a display control LSI, HD61830, etc., and generates liquid crystal driving signals. Features - Liquid crystal display driver with serial/parallel conversion function - Internal liquid crystal display driver: 80 drivers - Drives liquid crystal panels with 1/32- 1/128 duty cycle multiplexing - Can interface to LCD controllers, HD61830 and HD61830B - Data transfer rate: 2.5 MHz max - Power supply: VCC: 5 V ± 10% (internal logic) - Power supply voltage for liquid crystal display drive: 8 V to 17 V - CMOS process Ordering Information Type No. HD61200 Package 100-pin plastic QFP (FP-100) Free Datasheet http://..net/ Pin Arrangement Y30 Y29 Y28 Y27 Y26 Y25 Y24 Y23 Y22 Y21 Y20 Y19 Y18 Y17 Y16 Y15 Y14 Y13 Y12 Y11 Y10 Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 Y31 Y32 Y33 Y34 Y35 Y36 Y37 Y38 Y39 Y40 Y41 Y42 Y43 Y44 Y45 Y46 Y47 Y48 Y49 Y50 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 Y51 Y52 Y53 Y54 Y55 Y56 Y57 Y58 Y59 Y60 Y61 Y62 Y63 Y64 Y65 Y66 Y67 Y68 Y69 Y70 Y71 Y72 Y73 Y74 Y75 Y76 Y77 Y78 Y79 Y80 VEE V1L V2L V3L V4L GND CL1 FCS SHL CL2 DL DR E M CAR VCC V4R V3R V2R V1R (Top view) 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Free Datasheet http://..net/ 194 Y1 Y2 Y80 V1R V2RV3R V4R 1 2 3 4 5 6 7 8 80 1 2 3 4 5 6 7 8 80 1 2 3 4 5 6 7 8 S/P Block Diagram V1L V2L V3L V4L Liquid crystal display driver circuit 77 78 79 80 CL1 77 78 79 80 Latch circuit 2 80 bits VCC GND VEE Latch circuit 1 4 bit × 20 77 78 79 80 DL DR ø1 1 2 Selector ø2 ø20 20 5 SHL CL2 E E- F/F Test input S R Counter...