| Part number | HD74HCT74A |
|---|---|
| Datasheet | HD74HCT74A_HitachiSemiconductor.pdf |
| File Size | 57.83 KB |
| Manufacturer | Hitachi Semiconductor (now Renesas) |
| Description | Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset |
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The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset and clear are independent of the clock and acplished by a low level at the appropriate input.
See all Hitachi Semiconductor (now Renesas) datasheets
| Part Number | Description |
|---|---|
| HD74HCT00A | Quad. 2-input Positive NAND Gates |
| HD74HCT04A | Hex Inverters |
| HD74HCT08A | Quad. 2-input Positive AND Gates |
| HD74HCT125 | Quad. Bus Buffer Gates (with 3-state outputs) |
| HD74HCT126 | Quad. Bus Buffer Gates (with 3-state outputs) |
| HD74HCT137 | 3-to-8-line Decoder/Demultiplexer with Address Latch |
| HD74HCT138 | 3-to-8-line Decoder/Demultiplexer |
| HD74HCT1G04 | High speed CMOS inverter using silicon gate CMOS process |
| HD74HCT237 | 3-to-8-line Decoder/Demultiplexer with Address Latch |
| HD74HCT238 | 3-to-8-line Decoder/Demultiplexer |
