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HD74HCT74A - Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset

Datasheet Summary

Description

The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package.

The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse.

Features

  • VCC = 4.5 to 5.5 V operation.
  • Input terminal has protection diode Function Table Inputs PRE L H L H H H CLR H L L H H H CLK X X X ↑ ↑ L D X X X H L X Outputs Q H L H H L Q0.
  • 1 Q L H H.
  • 1 L H Q0 H : High level L : Low level X : Immaterial ↑ : Low to high transition Q0 : Level to Q before the indicated steady state input conditions were established. Note : 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if preset and cle.

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Datasheet Details

Part number HD74HCT74A
Manufacturer Hitachi Semiconductor
File Size 57.83 KB
Description Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
Datasheet download datasheet HD74HCT74A Datasheet
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Full PDF Text Transcription

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HD74HCT74A Dual D–type Positive Edge–triggered Flip Flops with Clear and Preset ADE-205-290 (Z) 1st. Edition June 1999 Description The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input. Features • VCC = 4.5 to 5.
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