• Part: HY57V281620HST
  • Manufacturer: SK Hynix
  • Size: 262.25 KB
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HY57V281620HST Key Features

  • Single 3.3±0.3V power supply All device pins are patible with LVTTL interface JEDEC standard 400mil 54pin TSOP-II with 0
  • Auto refresh and self refresh 4096 refresh cycles / 64ms Programmable Burst Length and Burst Type
  • 1, 2, 4, 8 or Full page for Sequential Burst
  • 1, 2, 4 or 8 for Interleave Burst Programmable CAS Latency ; 2, 3 Clocks

HY57V281620HST Description

The Hynix HY57V281620HC(L/S)T is a 134,217,728bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V281620HC(L/S)T is organized as 4banks of 2,097,152x16 HY57V281620HC(L/S)T is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input.