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HY5DV641622AT - 64M(4Mx16) DDR SDRAM

HY5DV641622AT Description

HY5DV641622AT 64M(4Mx16) DDR SDRAM HY5DV641622AT This document is a general product .
and is subject to change without notice.

HY5DV641622AT Features

* 3.3V for VDD and 2.5V for VDDQ power supply All inputs and outputs are compatible with SSTL_2 interface JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch Fully differential clock inputs (CK, /CK) operation Double

HY5DV641622AT Applications

* which requires high bandwidth. The Hynix 4Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks

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