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ICS844008I-15 Datasheet Preview

ICS844008I-15 Datasheet

CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844008I-15
FEMTOCLOCKS™ CRYSTAL-TO-
LVDS FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS844008I-15 is an 8 output LVDS
ICS Synthesizer optimized to generate PCI Express
HiPerClockS™ reference clock frequencies and is a member
of the HiPerClocksTM family of high performance
clock solutions from ICS. Using a 25MHz
parallel resonant crystal, the following frequencies can be
generated based on F_SEL pin: 100MHz or 125MHz. The
ICS844008I-15 uses ICS’ 3rd generation low phase noise
VCO technology and can achieve <1ps typical rms phase
jitter, easily meeting PCI Express jitter requirements. The
ICS844008I-15 is packaged in a 32-pin LQFP package.
FEATURES
• Eight LVDS outputs
• Crystal oscillator interface
• Supports the following output frequencies:
100MHz or 125MHz
• VCO: 500MHz
• RMS phase jitter @ 125MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.42ps (typical)
• Full 3.3V supply modes
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
FREQUENCY SELECT FUNCTIONTABLE
PIN ASSIGNMENT
Input
Frequency
(MHz)
25MHz
25MHz
Input
F_SEL
0
1
M Divider
Value
20
20
N Divider
Value
4
5
M/N Divider
Value
5
4
Output
Frequency
(MHz)
125
100
BLOCK DIAGRAM
nPLL_SEL Pulldown
Q0
nQ0
Q1
1 nQ1
32 31 30 29 28 27 26 25
Q0 1
24 Q7
nQ0 2
23 nQ7
VDD 3 ICS844008I-15 22 VDD
Q1
4
32-Lead LQFP
7mm x 7mm x 1.4mm
21
Q6
nQ1 5
package body
20 nQ6
GND 6
Y Package
19 GND
Q2 7
Top View
18 Q5
nQ2 8
17 nQ5
9 10 11 12 13 14 15 16
25MHz
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
500MHz
(w/25MHz
Reference)
0
÷4
÷5
Q2
nQ2
Q3
nQ3
Pullup
OE1
M = ÷20 (fixed)
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
MR Pulldown
F_SEL Pullup
OE2 Pullup
nQ7
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
844008AYI-15
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 2, 2006
1




ICS

ICS844008I-15 Datasheet Preview

ICS844008I-15 Datasheet

CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

No Preview Available !

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844008I-15
FEMTOCLOCKS™ CRYSTAL-TO-
LVDS FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number Name
Type
Description
1, 2 Q0, nQ0 Output
Differential output pair. LVDS interface levels.
3, 12,
22, 27
VDD Power
Core supply pin.
4, 5 Q1, nQ1 Ouput
Differential output pair. LVDS interface levels.
6, 13,
19, 29
GND
Power
Power supply ground.
7, 8 Q2, nQ2 Output
Differential output pair. LVDS interface levels.
9
F_SEL
Input Pullup Frequency select pin LVCMOS/LVTTL interface levels.
10, 11 Q3, nQ3 Output
Differential output pair. LVDS interface levels.
14, 15 Q4, nQ4 Output
Differential output pair. LVDS interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are reset
16
MR
Input
Pulld- causing the true outputs Qx to go low and the inverted outputs nQx
own to go high. When logic LOW, the internal dividers and the outputs are
enabled. LVCMOS/LVTTL interface levels.
17, 18 nQ5, Q5 Output
Differential output pair. LVDS interface levels.
20, 21 nQ6, Q6 Output
Differential output pair. LVDS interface levels.
23, 24 nQ7, Q7 Output
Differential output pair. LVDS interface levels.
25
26
28
30, 31
32
VDDA
nPLL_SEL
OE2
XTAL_OUT,
XTAL_IN
OE1
Power
Input
Input
Input
Input
Pulld-
own
Pullup
Pullup
Analog supply pin.
Selects between the PLL and REF_CLK as input to the dividers. When LOW,
selects PLL (PLL Enable). When HIGH, deselects the reference clock (PLL
Bypass). LVCMOS/LVTTL interface levels.
Output enable for Q5/nQ5:Q7/nQ7 outputs.
LVCMOS/LVTTL interface levels.
Parallel resonant crystal interface. XTAL_OUT is the output,
XTAL_IN is the input.
Output enable for Q0/nQ0:Q4/nQ4 outputs.
LVCMOS/LVTTL interface levels.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLDOWN
RPULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input PullUP Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
TABLE 3A. OE1 FUNCTION TABLE
Input Outputs
OE1 Q0:Q4, nQ0:nQ4
0 Places outputs in Hi-Z state
1 Normal operation
TABLE 3B. OE2 FUNCTION TABLE
Input Outputs
OE2 Q5:Q7, nQ5:nQ7
0 Places outputs in Hi-Z state
1 Normal operation
844008AYI-15
www.icst.com/products/hiperclocks.html
2
REV. A FEBRUARY 2, 2006


Part Number ICS844008I-15
Description CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
Maker ICS
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