8SLVS1118 Datasheet Low Additive Jitter LVDS/ LVPECL Fanout Buffer

Manufacturer: IDT

8SLVS1118 low additive jitter lvds/ lvpecl fanout buffer by IDT - Datasheet Preview

Datasheet Details

Part number	8SLVS1118
Manufacturer	IDT
File Size	566.10 KB
Description	Low Additive Jitter LVDS/ LVPECL Fanout Buffer
Download	8SLVS1118 Download (PDF)

General Description

The 8SLVS1118 is a high-performance, low-power, differential 1:18 output fanout buffer.

This highly versatile device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVS1118 ideal for clock distribution applications that demand well-defined performance and repeatability.

Overview

1:18, Low Skew, Low Additive Jitter LVDS/ LVPECL Fanout Buffer.

Key Features

1:18, low skew, low additive jitter LVPECL/LVDS fanout buffer.
Low power consumption.
Differential PCLK, nPCLK clock pair accepts the following differential/single-ended input levels: LVDS, LVPECL, and LVCMOS.
Maximum input clock frequency: 2GHz.
Propagation delay: 290ps (typical).
Output skew: 4.

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