* Twenty four LVPECL outputs.
* One differential clock input pair
* Differential input clock (CLK, nCLK) can accept the following signaling levels: LVDS, LVPE.

demanding well defined performance and repeatability. Features
* Twenty four LVPECL outputs.
* One differential.

The ICS853S024 is a low skew, 1-to-24 ICS Differential-to-3.3V, 2.5V LVPECL Fanout Buffer and HiPerClockS™ a member of theHiPerClockS™ family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input.

ICS853S006I

ICS853S011BI

ICS853S011CI

ICS853S012I

ICS853S013I

ICS853S014I

ICS853S01I

ICS853S057I

ICS853S12I

ICS853S310I

ICS853S54I

ICS8530

ICS8530-01