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ICS853S024 - LVPECL FANOUT BUFFER

Description

Performance Clock Solutions from IDT.

The CLK, nCLK pair can accept most standard differential input levels.

Features

  • Twenty four LVPECL outputs.
  • One differential clock input pair.
  • Differential input clock (CLK, nCLK) can accept the following signaling levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
  • Maximum output frequency: >1.5GHz.
  • Translates any single ended input signal to 3.3V/ 2.5V LVPECL levels with resistor bias on nCLK input.
  • Output skew: 25ps (typical).
  • t.

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Datasheet preview – ICS853S024

Datasheet Details

Part number ICS853S024
Manufacturer IDT
File Size 652.37 KB
Description LVPECL FANOUT BUFFER
Datasheet download datasheet ICS853S024 Datasheet
Additional preview pages of the ICS853S024 datasheet.

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Full PDF Text Transcription

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PRELIMINARY LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER ICS853S024 General Description The ICS853S024 is a low skew, 1-to-24 ICS Differential-to-3.3V, 2.5V LVPECL Fanout Buffer and HiPerClockS™ a member of theHiPerClockS™ family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels. The ICS853S024 is characterized to operate from either a 3.3V or a 2.5V power supply. Guaranteed output skew characteristics make the ICS853S024 ideal for those clock distribution applications demanding well defined performance and repeatability. Features • Twenty four LVPECL outputs.
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