IDT74SSTU32865 buffer equivalent, 28-bit 1:2 registered buffer.
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1.8V Operation SSTL_18 style clock and data inputs Differential CLK input Control inputs compatible with LVCMOS levels Flow-th.
* Along with CSPU877/A/D DDR2 PLL, provides complete solution for DDR2 DIMMs
* Optimized for DDR2-400/533 (PC2.
APPLICATIONS:
* Along with CSPU877/A/D DDR2 PLL, provides complete solution for DDR2 DIMMs
* Optimized for DDR2-400/533 (PC2-3200/4300) JEDEC Raw Card D
The SSTU32865 is a 28-bit 1:2 configurable registered buffer designed for 1.7V to 1.9.
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