ICS571 - Low Phase Noise Zero Delay Buffer

Product Overview

Integrated Circuit Systems

Datasheet Details

Part number	ICS571
Manufacturer	Integrated Circuit Systems
File Size	85.70 KB
Description	Low Phase Noise Zero Delay Buffer
Datasheet	ICS571 Datasheet
Additional preview pages of the ICS571 datasheet.

Product details

Description

The ICS571 is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques.

ICS introduced the world standard for these devices in 1992 with the debut of the AV9170, and updated that with the ICS570.

Features

Packaged in 8 pin SOIC.
Can function as low phase noise x2 multiplier.
Low skew outputs. One is ÷2 of other.
Input clock frequency up to 160 MHz at 3.3V.
Phase noise of better than -100 dBc/Hz from 1kHz to 1MHz offset from carrier.
Can recover poor input clock duty cycle.
Output clock duty cycle of 45/55 at 3.3V.
High drive strength for >100 MHz outputs.
Full CMOS clock swings with 25mA drive capability at T.

📁 Similar Datasheet

ICS571 - LOW PHASE NOISE ZERO DELAY BUFFER (IDT)
ICS570 - MULTIPLIER AND ZERO DELAY BUFFER (IDT)
ICS570 - MULTIPLIER AND ZERO DELAY BUFFER (Renesas)
ICS570-01 - MULTIPLIER AND ZERO DELAY BUFFER (Integrated Device Technology)
ICS574 - LOW SKEW BUFFER (Renesas)
ICS574 - LOW SKEW BUFFER (IDT)
ICS501 - PLL CLOCK MULTIPLIER (IDT)
ICS501 - PLL CLOCK MULTIPLIER (Renesas)

Other Datasheets by Integrated Circuit Systems

ICS570A - Multiplier and Zero Delay Buffer
ICS570B - Multiplier and Zero Delay Buffer
ICS574 - Zero Delay Low Skew Buffer
ICS501 - LOCO PLL Clock Multiplier
ICS501B - LOCO PLL Clock Multiplier
ICS502 - LOCO PLL Clock Multiplier

Published: Jun 1, 2006 |