zero delay clock generator.
* 5 differential 3.3V LVPECL outputs
* Selectable differential clock inputs
* CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVD.
the maximum input voltage for CLK, nCLK is VCC + 0.3V. NOTE 2: Common mode voltage is defined as VIH.
8735AY-01
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The ICS8735-01 is a highly versatile 1:5 Differential-to-3.3V LVPECL clock generator and a HiPerClockS™ member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8735-01 has a fully integrated PLL and can be configured as.
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