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IDT79R3051E - RISControllers

This page provides the datasheet information for the IDT79R3051E, a member of the IDT RISControllers family.

Description

Languages Clk2xIn Clock Generator Unit Master Pipeline Control System Control Coprocessor Exception/Control Registers Memory Management Registers BrCond(3:0) Integer CPU Core General Registers (32 x 32) ALU Shifter Int(5:0) Translation Lookaside Buffer (64 entries) Mult/Div Unit Address Adde

Features

  • Instruction set compatible with IDT79R3000A and IDT79R3001 MIPS RISC CPUs.
  • High level of integration minimizes system cost, power consumption.
  • IDT79R3000A /IDT79R3001 RISC Integer CPU.
  • R3051 features 4KB of Instruction Cache.
  • R3052 features 8KB of Instruction Cache.
  • All devices feature 2kB of Data Cache.
  • “E” Versions (Extended Architecture) feature full function Memory Management Unit, including 64entry Translation Lookaside Buffer.

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Datasheet preview – IDT79R3051E

Datasheet Details

Part number IDT79R3051E
Manufacturer Integrated Device
File Size 179.20 KB
Description RISControllers
Datasheet download datasheet IDT79R3051E Datasheet
Additional preview pages of the IDT79R3051E datasheet.

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Full PDF Text Transcription

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IDT79R3051/79R3052 RISControllers™ Integrated Device Technology, Inc.
Published: |