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Integrated Device Technology Electronic Components Datasheet

IDT71V256SB Datasheet

3.3V CMOS FAST SRAM WITH 2.5V COMPATIBLE INPUTS 256K (32K x 8-BIT)

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Integrated Device Technology, Inc.
3.3V CMOS FAST SRAM
WITH 2.5V COMPATIBLE INPUTS
256K (32K x 8-BIT)
IDT71V256SB
FEATURES
• Ideal for high-performance processor secondary cache
• Fast access times:
— 12/15/20ns
• Inputs are 2.5V and LVTTL compatible: VIH = 1.8V
• Outputs are LVTTL compatible
• Low standby current (maximum):
— 2mA full standby
• Small packages for space-efficient layouts:
— 28-pin 300 mil SOJ
— 28-pin TSOP Type I
• Produced with advanced high-performance CMOS
technology
• Single 3.3V(±0.3V) power supply
DESCRIPTION
The IDT71V256SB is a 262,144-bit high-speed static RAM
organized as 32K x 8. The improved VIH (1.8V) makes the
inputs compatible with 2.5V logic levels. The IDT71V256SB
is otherwise identical to the IDT71V256SA.
The IDT71V256SB has outstanding low power character-
istics while at the same time maintaining very high perfor-
mance. Address access times of as fast as12 ns are ideal for
tag SRAM in secondary cache designs.
When power management logic puts the IDT71V256SB in
standby mode, its very low power characteristics contribute to
extended battery life. By taking CS HIGH, the SRAM will
automatically go to a low power standby mode and will remain
in standby as long as CS remains HIGH. Furthermore, under
full standby mode (CS at CMOS level, f=0), power consump-
tion is guaranteed to always be less than 6.6mW and typically
will be much smaller.
The IDT71V256SB is packaged in 28-pin 300 mil SOJ and
28-pin300 mil TSOP Type I packaging.
FUNCTIONAL BLOCK DIAGRAM
A0
A14
I/O0
I/O7
CS
OE
WE
ADDRESS
DECODER
INPUT
DATA
CIRCUIT
CONTROL
CIRCUIT
262,144 BIT
MEMORY ARRAY
I/O CONTROL
VCC
GND
3770 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGES
©1997 Integrated Device Technology, Inc.
7.??
JANUARY 1997
3770/1
1


Integrated Device Technology Electronic Components Datasheet

IDT71V256SB Datasheet

3.3V CMOS FAST SRAM WITH 2.5V COMPATIBLE INPUTS 256K (32K x 8-BIT)

No Preview Available !

IDT71V256SB
3.3V CMOS STATIC RAM WITH 2.5V COMPATIBLE INPUTS 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
ABSOLUTE MAXIMUM RATINGS(1)
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1 28
2 27
3 26
4 25
5 24
6 23
7 SO28-5 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
SOJ
TOP VIEW
VCC
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
3770 drw 02
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
22
23
24
25
26
27
28
1
2
3
4
5
6
7
SO28-8
TSOP
TOP VIEW
21 A10
20 CS
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
14 GND
13 I/O2
12 I/O1
11 I/O0
10 A0
9 A1
8 A2
3770 drw 03
Symbol
VTERM(2)
VTERM(3)
Rating
Terminal Voltage with
Respect to GND
Terminal Voltage with
Respect to GND
Com’l.
–0.5 to +4.6
Unit
V
–0.5 to VCC+0.5 V
TA
Operating Temperature
0 to +70
°C
TBIAS
Temperature Under Bias –55 to +125
°C
TSTG
Storage Temperature
–55 to +125
°C
PT Power Dissipation
1.0 W
IOUT
DC Output Current
50 mA
NOTES:
3770 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals only.
3. Input, Output, and I/O terminals; 4.6V maximum.
CAPACITANCE
(TA = +25°C, f = 1.0MHz, SOJ package)
Symbol
Parameter(1)
Conditions Max. Unit
CIN Input Capacitance
VIN = 3dV
6 pF
COUT Output Capacitance VOUT = 3dV
7 pF
NOTE:
3770 tbl 04
1. This parameter is determined by device characterization, but is not
production tested.
PIN DESCRIPTIONS
Name
A0–A14
I/O0–I/O7
CS
WE
OE
GND
VCC
Description
Addresses
Data Input/Output
Chip Select
Write Enable
Output Enable
Ground
Power
TRUTH TABLE(1)
3770 tbl 01
WE
CS OE I/O
X H X High-Z
X VHC X High-Z
H L H High-Z
H L L DOUT
L L X DIN
NOTE:
1. H = VIH, L = VIL, X = Don’t Care
Function
Standby (ISB)
Standby (ISB1)
Output Disable
Read
Write
3770 tbl 02
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
Temperature
GND
VCC
Commercial
0°C to +70°C
0V 3.3V ± 0.3V
3770 tbl 05
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
Parameter
Min. Typ. Max. Unit
VCC Supply Voltage
3.0 3.3 3.6 V
GND Supply Voltage
00
0V
VIH Input High Voltage - Inputs 1.8 — 5.0 V
VIH
Input High Voltage - I/O
1.8 — Vcc+0.3 V
VIL Input Low Voltage
–0.5(1)
0.8 V
NOTE:
3770 tbl 06
1. VIL (min.) = –1.0V for pulse width less than 5ns, once per cycle.
2


Part Number IDT71V256SB
Description 3.3V CMOS FAST SRAM WITH 2.5V COMPATIBLE INPUTS 256K (32K x 8-BIT)
Maker Integrated Device Technology
Total Page 6 Pages
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