IS61DDB24M18A sram equivalent, 72mb ddr-ii (burst 2) cio synchronous sram.
* 2Mx36 and 4Mx18 configuration available.
* On-chip delay-locked loop (DLL) for wide data valid
window.
* Common I/O read and write ports.
* Synchronous .
where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system o.
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