CY7C1423KV18 (Cypress Semiconductor)
36-Mbit DDR II SIO SRAM Two-Word Burst Architecture
CY7C1423KV18/CY7C1424KV18
36-Mbit DDR II SIO SRAM Two-Word Burst Architecture
36-Mbit DDR II SIO SRAM Two-Word Burst Architecture
Features
■ 36-Mbit
(2 views)
CY7C1248KV18 (Cypress Semiconductor)
36-Mbit DDR II+ SRAM Two-Word Burst Architecture
CY7C1248KV18/CY7C1250KV18
36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)
36-Mbit DDR II+ SRAM Two-Word Burst Architecture
(2 views)
CY7C1548KV18 (Cypress Semiconductor)
72-Mbit DDR II+ SRAM Two-Word Burst Architecture
CY7C1548KV18/CY7C1550KV18
72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit DDR II+ SRAM Two-Word Burst Architecture
(2 views)
CY7C1668KV18 (Cypress Semiconductor)
144-Mbit DDR II+ SRAM Two-Word Burst Architecture
CY7C1668KV18 CY7C1670KV18
144-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
144-Mbit DDR II+ SRAM Two-Word Burst Architectur
(2 views)
EM68C16CWQG (Etron Technology)
64M x 16 bit DDRII Synchronous DRAM
EtronTech
EM68C16CWQG
64M x 16 bit DDRII Synchronous DRAM (SDRAM)
Advance (Rev. 1.5, Apr. /2016)
Features
JEDEC Standard Compliant JEDEC standa
(2 views)
EM68C08CWAG (Etron Technology)
128M x 8 bit DDRII Synchronous DRAM
EtronTech
EM68C08CWAG
128M x 8 bit DDRII Synchronous DRAM (SDRAM)
Advance (Rev. 1.1, Apr. /2016)
Features
JEDEC Standard Compliant JEDEC standa
(2 views)
M14D2561616A (ESMT)
DDR-II SDRAM
ESMT
DDR II SDRAM
(Preliminary)
M14D2561616A (2S)
4M x 16 Bit x 4 Banks DDR II SDRAM
Features
JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V
(2 views)
IS61DDP2B22M18A2 (Integrated Silicon Solution)
36Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B22M18A/A1/A2 IS61DDP2B21M36A/A1/A2
2Mx18, 1Mx36 36Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
(2.0 Cycle Read Latency)
ADVANCED INFORMATION JU
(2 views)
XRP2997 (MaxLinear)
2A DDRI/II/III/IV Bus Termination Regulator
XRP2997
2A DDRI/II/III/IV Bus Termination Regulator
August 2017
GENERAL DESCRIPTION
The XRP2997 is a Double Data Rate (DDR) termination voltage regul
(2 views)
UPD44164365 (NEC)
(UPD44164085/185/365) 18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD44164085, 44164185, 44164365
18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
Description
The µPD4416408
(2 views)
K7I641884M (Samsung semiconductor)
(K7I641884M / K7I643684M) 72Mb DDRII SRAM Specification
K7I643684M K7I641884M
2Mx36 & 4Mx18 DDRII CIO b4 SRAM
72Mb DDRII SRAM Specification
165 FBGA with Pb & Pb-Free
(RoHS compliant)
www.DataSheet4U.com
(2 views)
G2996 (Global Mixed-mode Technology)
DDR I/II Termination Regulator
www.DataSheet4U.com
Global Mixed-mode Technology Inc.
G2996
DDR I/II Termination Regulator
Features
General Description
The G2
(2 views)
CY7C1916CV18 (Cypress Semiconductor)
(CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1316CV18, CY7C1916CV18 CY7C1318CV18, CY7C1320CV18
18-Mbit DDR-II SRAM 2-Word Burst Architecture
Features
■ ■ ■ ■ ■
Functional Description
The CY
(2 views)
K7J321882M (Samsung semiconductor)
(K7J321882M / K7J323682M) 1Mx36 & 2Mx18 DDR II SIO b2 SRAM
K7J323682M K7J321882M www.DataSheet4U.com
Document Title
1Mx36 & 2Mx18 DDR II SIO b2 SRAM
1Mx36-bit, 2Mx18-bit DDR II SIO b2 SRAM
Revision History
(2 views)
CY7C1420BV18 (Cypress Semiconductor)
36-Mbit DDR-II SRAM 2-Word Burst Architecture
www.DataSheet4U.com
CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18
36-Mbit DDR-II SRAM 2-Word Burst Architecture
Features
■ ■ ■ ■ ■
Function
(2 views)
CY7C1418JV18 (Cypress Semiconductor)
36-Mbit DDR-II SRAM 2-Word Burst Architecture
www.DataSheet4U.com
CY7C1416JV18, CY7C1427JV18 CY7C1418JV18, CY7C1420JV18
36-Mbit DDR-II SRAM 2-Word Burst Architecture
Features
■ ■ ■ ■ ■
Function
(2 views)
CY7C1422BV18 (Cypress Semiconductor)
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1422BV18, CY7C1429BV18 CY7C1423BV18, CY7C1424BV18
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
Features
■ ■ ■ ■ ■
Functional Description
Th
(2 views)
CY7C1429JV18 (Cypress Semiconductor)
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1422JV18, CY7C1429JV18 CY7C1423JV18, CY7C1424JV18
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
Features
■ ■ ■ ■ ■
Functional Description
Th
(2 views)
CY7C1529V18 (Cypress Semiconductor)
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
CY7C1522V18 CY7C1529V18 CY7C1523V18 CY7C1524V18
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
Features
• 72-Mbit density (8M x 8, 8M x 9, 4M x 18
(2 views)
CY7C1320BV18 (Cypress Semiconductor)
18-Mbit DDR-II SRAM 2-Word Burst Architecture
CY7C1316BV18 CY7C1916BV18 CY7C1318BV18 CY7C1320BV18
18-Mbit DDR-II SRAM 2-Word Burst Architecture
Features
• 18-Mbit density (2M x 8, 2M x 9, 1M x 18
(2 views)
