CY7C1529V18

72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture

Cypress Semiconductor

* 72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36)

* 300-MHz clock for high bandwidth

* 2-Word burst for reducing address bus frequency

* Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz

* Two input clocks (K and K) for precise DDR t

CY7C1529V18

Cypress Semiconductor

491.53 KB

72-mbit ddr-ii sio sram 2-word burst architecture.

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