CY7C1520KV18, CY7C1518KV18 Datasheet - Cypress Semiconductor

CY7C1520KV18 72-Mbit DDR-II SRAM Two-Word Burst Architecture

CY7C1520KV18 Features

* 72-Mbit density (4M × 18, 2M × 36)

* 333 MHz clock for high bandwidth

* Two-word burst for reducing address bus frequency

* Double data rate (DDR) interfaces (data transferred at 666 MHz) at 333 MHz

* Two input clocks (K and K) for precise DDR timing

* SRAM uses rising edge

Datasheet Details

CY7C1520KV18, CY7C1518KV18

Cypress Semiconductor

604.50 KB

72-mbit ddr-ii sram two-word burst architecture.

This datasheet PDF includes multiple part numbers: CY7C1520KV18, CY7C1518KV18.
Please refer to the document for exact specifications by model.

📁 Related Datasheet

CY7C1520V18 1.8V Synchronous Pipelined SRAM (Cypress Semiconductor)

CY7C1521KV18 72-Mbit DDR II SRAM Four-Word Burst Architecture (Cypress Semiconductor)

CY7C1521V18 1.8V Synchronous Pipelined SRAM (Cypress Semiconductor)

CY7C1522AV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture (Cypress Semiconductor)

CY7C1522JV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture (Cypress Semiconductor)

CY7C1522KV18 72-Mbit DDR II SIO SRAM 2-Word Burst Architecture (Cypress Semiconductor)

CY7C1522V18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture (Cypress Semiconductor)

CY7C1523AV18 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture (Cypress Semiconductor)

TAGS

CY7C1520KV18 Distributor