CY7C1521KV18 Datasheet - Cypress Semiconductor

CY7C1521KV18, 72-Mbit DDR II SRAM Four-Word Burst Architecture

CY7C1521KV18 72-Mbit DDR II SRAM Four-Word Burst Architecture 72-Mbit DDR II SRAM Four-Word Burst Architecture

Features

* 72-Mbit Density (2M × 36)
* 250 MHz Clock for High Bandwidth
* Four-word Burst for reducing Address Bus Frequency
* Double Data Rate (DDR) Interfaces (data transferred at 500 MHz) at 250 MHz
* Two Input Clocks (K and K) for precise DDR Timing
* SRAM uses rising edges only

CY7C1521KV18-CypressSemiconductor.pdf