CY7C1520V18, CY7C1516V18 Datasheet - Cypress Semiconductor

CY7C1520V18, CY7C1516V18, 1.8V Synchronous Pipelined SRAM

CY7C1516V18, CY7C1527V18 CY7C1518V18, CY7C1520V18 72-Mbit DDR-II SRAM 2-Word Burst Architecture

Features

* 72-Mbit density (8M x 8, 8M x 9, 4M x 18, 2M x 36)
* 300 MHz clock for high bandwidth
* 2-word burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces (data transferred at 600 MHz) at 300 MHz
* Two input clocks (K and K) for precise DDR timing
* SRAM us

CY7C1516V18-CypressSemiconductor.pdf