CY7C1370C
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
Double-data-rate architecture
Double-data-rate architecture
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
Double-data-rate architecture
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture
32-bit MCU family built on the Power Architecture embedded category
Microcontroller Family Architecture and Instruction Set
AC/DC flyback architecture synchronous rectifier switch
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
32-bit MCU family built on the Power Architecture embedded category
2 Megabit CMOS 5.0 Volt-only Sector Architecture Flash Memory
32-bit MCU family built on the Power Architecture embedded category
(CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
(CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
18-Mbit DDR II SRAM Two-Word Burst Architecture
(CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
18-Mbit QDR II SRAM Four-Word Burst Architecture
(CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture