Datasheet Summary
CY7C1370C CY7C1372C
512K x 36/1M x 18 Pipelined SRAM with NoBL™ Architecture
Features
- Pin-patible and functionally equivalent to ZBT™
- Supports 250-MHz bus operations with zero wait states
- Available speed grades are 250, 225, 200 and 167 MHz
- Internally self-timed output buffer control to eliminate the need to use asynchronous OE
- Fully registered (inputs and outputs) for pipelined operation
- Byte Write capability
- Single 3.3V power supply
- 3.3V/2.5V I/O power supply
- Fast clock-to-output times
- 2.6 ns (for 250-MHz device)
- 2.8 ns (for 225-MHz device)
- 3.0 ns (for 200-MHz device)
- 3.4 ns (for 167-MHz device)
- Clock Enable (CEN) pin to suspend operation
- Synchronous...
