3.3V 1GHz DUAL 1:10 PRECISION
LVDS FANOUT BUFFER/
TRANSLATOR WITH 2:1 INPUT MUX
■ High-performance dual 1:10, 1GHz LVDS fanout
■ Two banks of 10 differential LVDS outputs
■ Guaranteed AC parameters over temperature and
• > 1GHz fMAX
• < 50ps within device skew
• < 400ps tr, tf time
■ Each bank includes a 2:1 input mux
■ 2:1 mux input accepts LVDS and LVPECL
■ Low jitter performance
• < 1psRMS cycle-to-cycle jitter
• < 1psPP total jitter
■ 3.3V supply voltage
■ Output enable function
■ LVDS input includes internal 100Ω termination
■ Available in a 64-Pin EPAD-TQFP
■ Enterprise networking
■ High-end servers
TYPICAL APPLICATION CIRCUIT
The SY89828L is a precision fanout buffer with 20
differential LVDS (Low Voltage Differential Swing) output
pairs. The part is designed for use in low voltage 3.3V
applications that require a large number of outputs to drive
precisely aligned, ultra low-skew signals to their destination.
The input is multiplexed from either LVDS or LVPECL (Low
Voltage Positive Emitter Coupled Logic) by the CLK_SEL1
and CLK_SEL2 pins. The Output Enables (OE1 and OE2)
are synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
The SY89828L features a low pin-to-pin skew of less
than 50ps—performance previously unachievable in a
standard product having such a high number of outputs.
The SY89828L is available in a single space saving package,
enabling a lower overall cost solution.
Primary Clock Source
Backup Clock Source
Primary/Backup Clock Select
(Switchover with 2.0ns)
System using SY89828L as a switchover circuit from a Primary Clock to a Redundant backup Clock in a fail-safe application.
LVPECL inputs not shown in this application.
Precision Edge is a registered trademark of Micrel, Inc.
firstname.lastname@example.org or (408) 955-1690
Rev.: D Amendment: /0
Issue Date: January 2008