Part M2V12D20TP-10
Description 512M Double Data Rate Synchronous DRAM
Manufacturer Mitsubishi Electric
Size 754.04 KB
Mitsubishi Electric
M2V12D20TP-10

Overview

M2S12D20TP is a 4-bank x 33,554,432-word x 4-bit, M2S12D30TP is a 4-bank x 16,777,216-word x 8-bit, double data rate synchronous DRAM, with SSTL_2 interface. All control and address signals are referenced to the rising edge of CLK.