MCM69Q536 - 32K x 36 Bit Synchronous Separate I/O SRAM

Motorola

MCM69Q536 Datasheet Preview — Preview of MCM69Q536 PDF

Datasheet Details

Part number	MCM69Q536
Manufacturer	Motorola
File Size	183.03 KB
Description	32K x 36 Bit Synchronous Separate I/O SRAM
Datasheet	MCM69Q536_MotorolaInc.pdf

MCM69Q536 Product details

Description

Pin Locations 55, 57, 59, 61, 63, 65, 68, 70, 72, 74, 76, 143, 145, 167, 169 2, 6, 8, 12, 14, 18, 20, 25, 27, 31, 33, 37, 39, 43, 47, 51, 82, 86, 90, 94, 96, 100, 102, 106, 108, 113. A14 D0 D35 Type Input Input Description Synchronous Address Inputs: These inputs are registered and must meet setup and hold times.

Features

separate data input and data output buffers and incorporates input and output registers on board with high speed SRAM. The MCM69Q536 allows the user to perform transparent writes and data pass through. Two data bus ports are provided.
a data input (D) and a data output (Q) port. The synchronous design allows for precise cycle control with the use of an external single clock (K). Address port, data input (D0.
D35), data output (Q0.
Q35), write enable (W), chip enables (.

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Published: Apr 30, 2005 |