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Motorola Electronic Components Datasheet

MTB4N80E1 Datasheet

TMOS POWER FET

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
TMOS E-FET.
High Energy Power FET
D2PAK-SL Straight Lead
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Robust High Voltage Termination
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
Short Heatsink Tab Manufactured — Not Sheared
Specially Designed Leadframe for Maximum Power Dissipation
G
®
D
S
Order this document
by MTB4N80E1/D
MTB4N80E1
Motorola Preferred Device
TMOS POWER FET
4.0 AMPERES
800 VOLTS
RDS(on) = 3.0 OHM
CASE 418C–01, Style 2
D2PAK–SL
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Drain–Source Voltage
VDSS
800
Drain–Gate Voltage (RGS = 1.0 M)
VDGR
800
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp 10 ms)
VGS
VGSM
± 20
± 40
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp 10 µs)
ID 4.0
ID 2.9
IDM 12
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C, when mounted with the minimum recommended pad size
PD 125
1.0
2.5
Operating and Storage Temperature Range
TJ, Tstg – 55 to 150
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 8.0 Apk, L = 10 mH, RG = 25 )
EAS
320
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size
RθJC
RθJA
RθJA
1.0
62.5
50
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds
TL 260
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
©MMoottoororolal,aInTc.M19O9S7 Power MOSFET Transistor Device Data
1


Motorola Electronic Components Datasheet

MTB4N80E1 Datasheet

TMOS POWER FET

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MTB4N80E1
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 800 Vdc, VGS = 0 Vdc)
(VDS = 800 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0)
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Temperature Coefficient (Negative)
V(BR)DSS
800
1.02
— Vdc
— mV/°C
IDSS
µAdc
— — 10
— — 100
IGSS
— — 100 nAdc
VGS(th)
2.0 3.0 4.0 Vdc
— 7.0 — mV/°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 2.0 Adc)
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 4.0 Adc)
(ID = 2.0 Adc, TJ = 125°C)
Forward Transconductance (VDS = 15 Vdc, ID = 2.0 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
(VDD = 400 Vdc, ID = 4.0 Adc,
VGS = 10 Vdc,
RG = 9.1 )
(VDS = 400 Vdc, ID = 4.0 Adc,
VGS = 10 Vdc)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 4.0 Adc, VGS = 0 Vdc)
(IS = 4.0 Adc, VGS = 0 Vdc, TJ = 125°C)
RDS(on)
VDS(on)
gFS
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QT
Q1
Q2
Q3
VSD
— 1.95 3.0 Ohm
Vdc
— 8.24 12
— — 10
2.0 4.3
— mhos
1320
2030
pF
— 187 400
— 72 160
— 13 30
— 36 90
— 40 80
— 30 75
— 36 80
— 7.0 —
— 16.5 —
— 12 —
ns
nC
0.812
1.5
— 0.7 —
Vdc
Reverse Recovery Time
(See Figure 14)
(IS = 4.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
Reverse Recovery Stored Charge
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25from package to center of die)
trr
ta
tb
QRR
LD
— 557 —
— 100 —
— 457 —
— 2.33 —
— 4.5 —
ns
µC
nH
Internal Source Inductance
(Measured from the source lead 0.25from package to source bond pad)
(1) Pulse Test: Pulse Width 300 µs, Duty Cycle 2%.
(2) Switching characteristics are independent of operating junction temperature.
LS
— 7.5 — nH
2 Motorola TMOS Power MOSFET Transistor Device Data


Part Number MTB4N80E1
Description TMOS POWER FET
Maker Motorola
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