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S7B801835M Datasheet 256kx36 & 512kx18 Flow-through Sram

Manufacturer: NETSOL

Overview: S7B803635M SS77BB880013863355MM S7B801835M 256Kx36 & 512Kx18 Flow-Through SRAM 256Kx36 & 512Kx18 Flow-Through SRAM 9Mb Sync. Flow-Through SRAM Specification NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. For updates or additional information about Netsol products, please contact to netsol@netsol.co.kr Rev. 1.1 Mar. 2018 -1- S7B803635M S7B801835M 256Kx36 & 512Kx18 Flow-Through SRAM Document Title 256Kx36 & 512Kx18 Bit Flow-Through SRAM Revision History Rev. No. History 0.0 Initial Draft 1.0 1. Final Spec Release 2. Insert ICC Parameters 1.1 Correct Typo Draft Date Aug. 2011 Nov. 2011 Remark Preliminary Final Mar. 2018 Final Rev. 1.1 Mar.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply.
  • VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V).
  • Synchronous Operation.
  • Self-Timed Write Cycle.
  • On-Chip Address Counter and Control Registers.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • Power Down State via ZZ Signal.
  • LBO Pin allows a choice of either a interleaved burst or a lin- ear b.

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