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NT5SV32M8AT - (NT5SVxxMxxAT) Synchronous DRAM

Download the NT5SV32M8AT datasheet PDF (NT5SV16M16AT included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for (nt5svxxmxxat) synchronous dram.

Description

The NT5SV64M4AT, NT5SV32M8AT, and NT5SV16M16AT are four-bank Synchronous DRAMs organized as 16Mbit x 4 I/O x 4 Bank, 8Mbit x 8 I/O x 4 Bank, and 4Mbit x 16 I/O x 4 Bank, respectively.

Features

  • High Performance: -7K 3 CL=2 fCK tCK tAC tAC Clock Frequency Clock Cycle Clock Access Time 1 133 7.5.
  • 5.4 -75B, CL=3 133 7.5.
  • 5.4 -8B, CL=2 100 10.
  • 6 Units MHz ns ns ns Clock Access Time 2 1. Terminated load. See AC Characteristics on page 37. 2. Unterminated load. See AC Characteristics on page 37. 3. tRP = tRCD = 2 CKs.
  • Multiple Burst R.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (NT5SV16M16AT_Nanya.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number NT5SV32M8AT
Manufacturer Nanya
File Size 840.91 KB
Description (NT5SVxxMxxAT) Synchronous DRAM
Datasheet download datasheet NT5SV32M8AT Datasheet

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Full PDF Text Transcription

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www.DataSheet4U.com NT5SV64M4AT(L) NT5SV32M8AT(L) NT5SV16M16AT(L) 256Mb Synchronous DRAM Features • High Performance: -7K 3 CL=2 fCK tCK tAC tAC Clock Frequency Clock Cycle Clock Access Time 1 133 7.5 — 5.4 -75B, CL=3 133 7.5 — 5.4 -8B, CL=2 100 10 — 6 Units MHz ns ns ns Clock Access Time 2 1. Terminated load. See AC Characteristics on page 37. 2. Unterminated load. See AC Characteristics on page 37. 3. tRP = tRCD = 2 CKs • • • • • • • • • • • • Multiple Burst Read with Single Write Option Automatic and Controlled Precharge Command Data Mask for Read/Write control (x4, x8) Dual Data Mask for byte control (x16) Auto Refresh (CBR) and Self Refresh Suspend Mode and Power Down Mode Standard Power operation 8192 refresh cycles/64ms Random Column Address every CK (1-N Rule) Single 3.
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