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CD4027BM - Dual J-K Master/Slave Flip-Flop

The CD4027BM by National Semiconductor is a Dual J-K Master/Slave Flip-Flop. Below is the official datasheet preview.

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Official preview page of the CD4027BM Dual J-K Master/Slave Flip-Flop datasheet (National Semiconductor).

CD4027BM Product details

Description

These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and Pchannel enhancement mode transistors Each flip-flop has independent J K set reset and clock inputs and buffered Q and Q outputs These flip-flops are edge sensitive to the clock input and change state on the positive-going transition of the clock pulses Set or reset is independent of the clock and is accomplished by a high level on the respective input All inputs are protected against da

Features

📁 CD4027BM Similar Datasheet

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Other Datasheets by National Semiconductor
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