• Part: CGS700V
  • Description: Commercial Low Skew PLL 1 to 9 CMOS Clock Driver
  • Manufacturer: National Semiconductor
  • Size: 180.74 KB
CGS700V Datasheet (PDF) Download
National Semiconductor
CGS700V

Description

CGS700 is an off the shelf clock driver specifically designed around the PowerPc™ architecture. It provides low skew outputs which are produced at different frequencies from three fixed input references.

Key Features

  • Guaranteed and tested: - 500 ps pin-to-pin skew (toSHL and toSLH) on 1X outputs
  • Output buffer of nine drivers for large fanout
  • 25 MHz-160 MHz output frequency range
  • Outputs operating at 4X, 2X, 1X of the reference fre- quency for multi-frequency bus applications
  • Selectable output frequency
  • TRI-STATE output control with the PLL is in the lock state
  • Internal loop filter to reduce noise and jitter
  • Separate analog and digital Vee and Ground pins
  • Low frequency test mode by disabling the PLL
  • Implemented on National's Core CMOS process