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CGS701AV Datasheet Commercial/ Industrial Low Skew Pll 1 To 8 CMOS Clock Driver

Manufacturer: National Semiconductor (now Texas Instruments)

Overview: CGS701AV mercial Low Skew PLL 1 to 8 CMOS Clock Driver CGS701ATV Industrial Low Skew PLL 1 to 8 CMOS Clock Driver December 1995 CGS701AV mercial Low Skew PLL 1 to 8 CMOS Clock Driver CGS701ATV Industrial Low Skew PLL 1.

General Description

CGS701A is an off the shelf clock driver specifically designed for today’s high speed designs It provides low skew outputs which are produced at different frequencies from three fixed input references The XTALIN input pin is designed to be driven from a 25 MHz–40 MHz crystal oscillator The PLL using a charge pump and an internal loop filter multiplies this input frequency to create a maximum output frequency of four times the input The device includes a TRI-STATE control pin to disable the outputs This

Key Features

  • Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Guaranteed 400 ps pin-to-pin skew (tOSHL and tOSLH) on 1X outputs Pentium and PowerPCTM compatible g 300 ps propagation delay Output buffer of eight drivers for large fanout 25 MHz.
  • 160 MHz output frequency range Outputs operating at 4X 2X 1X of the reference frequency for multifrequency bus.

More Datasheets from National Semiconductor (now Texas Instruments)

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CGS701AV Distributor