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  ON Semiconductor Electronic Components Datasheet  

NB4N316M Datasheet

AnyLevel Receiver to CML Driver/Translator

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NB4N316M
3.3 V AnyLevelt Receiver
to CML Driver/Translator
with Input Hysteresis
2.0 GHz Clock / 2.5 Gb/s Data
The NB4N316M is a differential Clock or Data receiver and will
accept AnyLevelt input signals: LVPECL, CML, LVCMOS,
LVTTL, or LVDS. These signals will be translated to CML, operating
up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N316M is
ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or
Data distribution applications. The CML outputs are 16 mA open
collector (see Figure 18) which requires resistor (RL) load path to VTT
termination voltage (see Figure 19). The open collector CML outputs
must be terminated to VTT at power up. The differential outputs
produce Current–Mode Logic (CML) compatible levels when the
receiver is loaded with 50 W or 25 W loads connected to 1.8 V, 2.5 V
or 3.3 V supplies. This simplifies device interface by eliminating a
need for coupling capacitors.
The NB4N316M features an input threshold hysteresis of
approximately 25 mV, providing increased noise immunity and stability.
The device is offered in a small 8pin TSSOP package (MSOP8
compatible). Application notes, models, and support documentation
are available at www.onsemi.com.
Features
Maximum Input Clock Frequency > 2.0 GHz
Maximum Input Data Rate > 2.5 Gb/s
Typically 1 ps of RMS Clock Jitter
Typically 10 ps of Data Dependent Jitter
550 ps Typical Propagation Delay
150 ps Typical Rise and Fall Times
Differential CML Outputs
25 mV of Receiver Input Threshold Hysteresis
Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V and
VTT = 1.8 V to 3.6 V
Functionally Compatible with Existing 2.5 V / 3.3 V LVEL,
LVEP, EP, and SG Devices
40°C to +85°C Ambient Operating Temperature
These are PbFree Devices*
http://onsemi.com
8
1
TSSOP8
DT SUFFIX
CASE 948R
MARKING
DIAGRAM*
8
E316
ALYWG
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
DQ
DQ
Figure 1. Functional Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 3
1
Publication Order Number:
NB4N316M/D


  ON Semiconductor Electronic Components Datasheet  

NB4N316M Datasheet

AnyLevel Receiver to CML Driver/Translator

No Preview Available !

NC 1
D2
D3
VBB 4
NB4N316M
8 VCC
7Q
6Q
5 VEE
Figure 2. Pinout (Top View) and Logic Diagram
Table 1. Pin Description
Pin Name
I/O
Description
1 NC
No Connect.
2 D ECL, CML, LVCMOS, LVDS, Noninverted Differential Input. (Note 1)
LVTTL Input
3 D ECL, CML, LVCMOS, LVDS, Inverted Differential Input. (Note 1)
LVTTL Input
4 VBB
Internally Generated Reference Voltage Supply.
5 VEE
Negative Supply Voltage.
6Q
CML Output
Inverted Differential Output. Typically Terminated with 50 W Resistor to VTT.
7Q
CML Output
Noninverted Differential Output. Typically Terminated with 50 W Resistor to VTT.
8 VCC
Positive Supply Voltage.
1. In the differential configuration if no signal is applied on D/D input, then the device will be susceptible to selfoscillation.
http://onsemi.com
2


Part Number NB4N316M
Description AnyLevel Receiver to CML Driver/Translator
Maker ON Semiconductor
Total Page 12 Pages
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