3.3V/5V, 50 MHz to 200 MHz
PECL Clock Synthesizer
The NB4N507A is a precision clock synthesizer which generates a
very low jitter differential PECL output clock. It produces a clock
output based on an integer multiple of an input reference frequency.
The NB4N507A accepts a standard fundamental mode crystal,
using Phase-Locked-Loop (PLL) techniques, will produce output
clocks up to 200 MHz. In addition, the PLL circuitry will produce a
50% duty cycle square-wave clock output (see Figure 7).
The NB4N507A can be programmed to generate a selection of input
reference frequency multiples. An exact 155.52 MHz output clock can
be generated from a 19.44 MHz crystal and the x8 multiplier selection.
The NB4N507A is intended for low output jitter clock generation.
The PECL outputs are 15 mA open collector and must be DC loaded
and AC terminated. See Figures 4 and 6.
•ăInput Crystal Frequency of 10 - 27 MHz
•ăEnable Usage of Common Low-Cost Crystal
•ăDifferential PECL Output Clock Frequencies up to 200 MHz
•ăDuty Cycle of 48%/52%
•ăOperating Range: VCC = 3.0 V to 5.5 V
•ăIdeal for SONET Applications and Oscillator Manufacturers
•ăAvailable in Die Form
•ăPackaged in 16-Pin Narrow SOIC
•ăPb-Free Packages are Available*
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb-Free Package
Figure 1. Simplified Logic Block Diagram
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©Ă Semiconductor Components Industries, LLC, 2007
September, 2007 - Rev. 3
Publication Order Number: