Download PI6CVF857 Datasheet PDF
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PI6CVF857 Key Features

  • Operating Frequency up to 220 MHz for PC3200 Registered DIMM

PI6CVF857 Description

PI6CVF857 PLL clock device is developed for registered DDR DIMM applications. The device is a zero-delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock outputs (Y[0:9], Y[0:9]), and one differential pair feedback clock outputs (FBOUT,FBOUT) . The clock outputs are controlled by the input clocks (CLK, CLK), the feedback clocks (FBIN,FBIN), the 2.5V LVCMOS input...

PI6CVF857 Applications

  • Distributes one differential clock input pair to ten differential clock output pairs