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PLL130-07 - High Speed Translator Buffer to CMOS

Datasheet Summary

Description

The PLL130-07 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 200MHz.

It provides CMOS output with 15pF output load drive capability.

Any input signal with at least 100mV swing can be used as reference signal.

Features

  • CMOS output Selectable Drive capability (15pF or 30pF output load).
  • Single AC coupled input (min. 100mV swing).
  • Input range from DC to 200 MHz.
  • 2.5V to 3.3V operation.
  • Available in 8-Pin SOIC and 3x3mm QFN. www. DataSheet4U. com.
  • PIN.

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Datasheet preview – PLL130-07

Datasheet Details

Part number PLL130-07
Manufacturer PhaseLink Corporation
File Size 264.10 KB
Description High Speed Translator Buffer to CMOS
Datasheet download datasheet PLL130-07 Datasheet
Additional preview pages of the PLL130-07 datasheet.

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Full PDF Text Transcription

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PLL130-07 High Speed Translator Buffer to CMOS (Selectable Drive) FEATURES CMOS output Selectable Drive capability (15pF or 30pF output load). • Single AC coupled input (min. 100mV swing). • Input range from DC to 200 MHz. • 2.5V to 3.3V operation. • Available in 8-Pin SOIC and 3x3mm QFN. www.DataSheet4U.com • • PIN CONFIGURATION (TOP VIEW) GND REF_IN GND VDD 1 2 3 4 8 7 6 5 DRIV_SEL^ VDD GND CLK_OUT PLL130-07 DESCRIPTION The PLL130-07 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 200MHz. It provides CMOS output with 15pF output load drive capability. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave to CMOS.
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