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PLL130-08 - High Speed Translator Buffer to PECL

Datasheet Summary

Description

The PLL130-08 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz.

It provides a pair of differential PECL output.

Any input signal with at least 100mV swing can be used as reference signal.

Features

  • Differential PECL output Single AC coupled input (min. 100mV swing). Input range from DC to 1.0 GHz. 2.5V to 3.3V operation. Available in 8-Pin SOIC or 3x3mm QFN. PIN.

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Datasheet preview – PLL130-08

Datasheet Details

Part number PLL130-08
Manufacturer PhaseLink Corporation
File Size 273.05 KB
Description High Speed Translator Buffer to PECL
Datasheet download datasheet PLL130-08 Datasheet
Additional preview pages of the PLL130-08 datasheet.

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Full PDF Text Transcription

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PLL130-08 High Speed Translator Buffer to PECL FEATURES • • • • • Differential PECL output Single AC coupled input (min. 100mV swing). Input range from DC to 1.0 GHz. 2.5V to 3.3V operation. Available in 8-Pin SOIC or 3x3mm QFN. PIN CONFIGURATION (TOP VIEW) GND REF_IN GND PECL 1 2 3 4 8 7 6 5 VDD GND PECL_BAR VDD PLL130-08 www.DataSheet4U.com DESCRIPTION The PLL130-08 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz. It provides a pair of differential PECL output. Any input signal with at least 100mV swing can be used as reference signal. This chip is ideal for conversion from sine wave, TTL, CMOS, or LVDS to PECL.
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