841S01 Datasheet | Renesas

PCI Express TM Clock Generator DATA SHEET General Description The 841S01 is a PLL-based clock generator specifically designed for PCI_Express™ Clock Generation applications. This device generates a 100MHz HCSL clock. The device offers a HCSL (Host Clock Signal Level) clock output from a clock input reference of 25MHz. The input reference may be derived from an external source or by the addition of a 25MHz crystal to the on-chip crystal oscillator. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left floating. The device offers spread spectrum clock output for reduced EMI applications. An I2C bus interface is used to enable or disable spread spectrum operation as well as select either a down spread value of -0.35% or -0.5%. Features - One 0.7V current mode differential HCSL output pair - Crystal oscillator interface: 25MHz - Output frequency: 100MHz - RMS period jitter: 3ps (maximum) - Cycle-to-cycle jitter: 35ps (maximum) - I2C support with readback capabilities up to 400k Hz - Spread Spectrum for electromagnetic interference (EMI) reduction - 3.3V operating supply mode - 0°C to 70°C ambient operating temperature - Available in lead-free (Ro HS 6) package Block Diagram 25MHz XTAL_IN XTAL_OUT SDATA Pullup SCLK Pullup I2C Logic IREF Divider Network SRCT0 SRCC0 Pin Assignment VSS VDD SRCT0 SRCC0 VDD VSS IREF VSS 1 2 3 4 5 6 7 8 16 VDD 15 SDATA 14 SCLK 13 XTAL_OUT 12 XTAL_IN 11 VDD 10...