HD74HC595 Datasheet - Renesas

8-bit Shift Register/Latch

HD74HC595 Features

* High Speed Operation: tpd (RCK to Q) = 17 ns typ (CL = 50 pF)

* High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs)

* Wide Operating Voltage: VCC = 2 to 6 V

* Low Input Current: 1 µA max

* Low Quiescent Supply Current: ICC (static) = 4 µA max

HD74HC595 General Description

This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clea.

HD74HC595 Datasheet (105.58 KB)