8-bit shift register/latch.
* High Speed Operation: tpd (RCK to Q) = 17 ns typ (CL = 50 pF)
* High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs)
* Wide Operating Voltage: .
This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage registe.
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