IDT71V35761S - 128K x 36 3.3V Synchronous SRAM

Renesas

Datasheet Details

The IDT71V35761 are high-speed SRAMs organized as 128K x 36.

The IDT71V35761 SRAMs contain write, data, address and controlregisters.

InternallogicallowstheSRAMtogenerateaself-timed write based upon a decision which can be left until the end of the write cycle.

128K x 36 3.3V Synchronous SRAMs IDT71V35761S/SA 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle.

128K x 36 memory configurations.
Supports high system speed: Commercial:.
200MHz 3.1ns clock access time Commercial and Industrial:.
183MHz 3.3ns clock access time.
166MHz 3.5ns clock access time.
LBO input selects interleaved or linear burst mode.
3.3V core power supply Functional Block Diagram LBO ADV CLK ADSC ADSP.
Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx).
Power down control.

Brand Logo	Part Number	Description	Manufacturer
	IDT71V35761S	3.3V Synchronous SRAMs	IDT
	IDT71V35761SA	3.3V Synchronous SRAMs	IDT