K4S643232H-UC-L50 Overview
The K4S643232H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle.
K4S643232H-UC-L50 Key Features
- JEDEC standard 3.3V power supply
- LVTTL patible with multiplexed address
- Four banks operation
- MRS cycle with address key programs
- CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
- All inputs are sampled at the positive going edge of the system clock
- Burst read single-bit write operation
- DQM (x4,x8) & L(U)DQM (x16) for masking
- Auto & self refresh
- 15.6us refresh duty cycle
K4S643232H-UC-L50 Applications
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