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LH5PV16256 - CMOS 4M (256K x 16) Pseudo-Static RAM

General Description

The LH5PV16256 is a 4M bit Pseudo-Static RAM with a 262,144 words × 16 bit organization.

Key Features

  • 262,144 words × 16 bit organization.
  • Power supply: +3.0 ± 0.15 V.
  • Access time: 120 ns (MAX. ).
  • Cycle time: 190 ns (MIN. ).
  • Power consumption (MAX. ): 126 mW (Operating) 94.5 µW (Standby = CMOS input level) 220.5 µW (Self-refresh = CMOS input level).
  • LVTTL compatible I/O.
  • Available for address refresh, auto-refresh, and self-refresh modes.
  • 2,048 refresh cycles/32 ms.
  • Address non-multiple.
  • Available for byte wr.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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LH5PV16256 FEATURES • 262,144 words × 16 bit organization • Power supply: +3.0 ± 0.15 V • Access time: 120 ns (MAX.) • Cycle time: 190 ns (MIN.) • Power consumption (MAX.): 126 mW (Operating) 94.5 µW (Standby = CMOS input level) 220.5 µW (Self-refresh = CMOS input level) • LVTTL compatible I/O • Available for address refresh, auto-refresh, and self-refresh modes • 2,048 refresh cycles/32 ms • Address non-multiple • Available for byte write mode using UWE and LWE pins • Package: 44-pin, TSOP (Type II) • Process: Silicon-gate CMOS • Operating temperature: 0 - 70°C • Not designed or rated as radiation hardened CMOS 4M (256K × 16) Pseudo-Static RAM DESCRIPTION The LH5PV16256 is a 4M bit Pseudo-Static RAM with a 262,144 words × 16 bit organization.