74HC595D Datasheet - Toshiba

8-Bit Shift Register/Latch

74HC595D Features

* (1) High speed: fMAX = 55 MHz (typ.) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V 4. Packaging SOIC16 ©2016 Toshiba Corporation 1 Start of commercial production 2016

74HC595D General Description

* 8-Bit Shift Register/Latch (3-state) 2. General The 74HC595D is a high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate C2MOS technology. It achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 74HC595D contains an .

74HC595D Datasheet (267.12 KB)