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TC58BVG1S3HBAI4 Datasheet

Manufacturer: Toshiba
TC58BVG1S3HBAI4 datasheet preview

Datasheet Details

Part number TC58BVG1S3HBAI4
Datasheet TC58BVG1S3HBAI4-Toshiba.pdf
File Size 668.64 KB
Manufacturer Toshiba
Description 2 GBIT (256M x 8 BIT) CMOS NAND E2PROM
TC58BVG1S3HBAI4 page 2 TC58BVG1S3HBAI4 page 3

TC58BVG1S3HBAI4 Overview

The device has a 2112-byte static register which allows program and read data to be transferred between the register and the memory cell array in 2112-bytes increments. The Erase operation is implemented in a single block unit (128 Kbytes + 4 Kbytes: The TC58BVG1S3HBAI4 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for mand inputs.

TC58BVG1S3HBAI4 Key Features

  • Organization
  • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Read, Multi Page Program, Mul
  • Mode control Serial input/output mand control
  • Number of valid blocks Min 2008 blocks Max 2048 blocks
  • Power supply VCC = 2.7V to 3.6V
  • Access time Cell array to register 40 µs typ. (Single Page Read) / 55us typ. (Multi Page Read) Serial Read Cycle 25 ns m
  • Program/Erase time Auto Page Program Auto Block Erase
  • Operating current Read (25 ns cycle) Program (avg.) Erase (avg.) Standby
  • Package P-TFBGA63-0911-0.80CZ (Weight: 0.15 g typ.)
  • 8bit ECC for each 528Byte is implemented on the chip
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