CDCDLP223 Overview
Key Specifications
Package: TSSOP
Mount Type: Surface Mount
Pins: 20
Operating Voltage: 3.3 V
Description
The CDCDLP223 is a PLL-based high performance clock synthesizer that is optimized for use in DLP™ systems. It uses a 20 MHz crystal to generate the fundamental frequency and derives the frequencies for the 100 MHz HCLK and the 300 MHz HCLK output.
Key Features
- High-Performance Clock Synthesizer
- Uses a 20 MHz Crystal Input to Generate Multiple Output Frequencies
- Integrated Load Capacitance for 20 MHz Oscillator Reducing System Cost
- All PLL Loop Filter Components are Integrated
- Generates the Following Clocks: – REF CLK 20 MHz (Buffered) – XCG CLK 100 MHz With SSC – DMD CLK 200-400 MHz With Selectable SSC