* 1 Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications
* Spread Spectrum Clock Compatible
* Operating Frequency: 24 MHz to 200 MHz
* Low Jitter (Cycle-to-Cycle): < |150 ps| (Over 66 MHz to 200 MHz Range)
* Distributes One Clock I
CDCVF2505 Datasheet (890.25 KB)
CDCVF2505
890.25 KB
3.3-v clock phase-lock loop clock driver.
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCVF2505 SCAS640G JULY 2000 REVISED AUG.
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