CDCVF2505-Q1 Overview
Description
The CDCVF2505 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the output clocks (1Y[0–3] and CLKOUT) to the input clock signal (CLKIN).
Key Features
- Qualified for Automotive Applications
- Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications
- Spread-Spectrum Clock Compatible
- Operating Frequency: 24 MHz to 200 MHz
- Low Jitter (Cycle-to-Cycle): <150 ps Over the Range 66 MHz to 200 MHz