MX21 - CMOS Gate Array
MX2x is a family of two-to-one digital multiplexers.
Logic Symbol Truth Table MX2x S |0 Q |1 S I0 I1 Q LLXL LHXH HXL L HXHH HDL Syntax Verilog MX2x inst_name (Q, I0, I1, S); VHDL inst_name: MX2x port map (Q, I0, I1, S); Pin Loading Pin Name I0 I1 S MX21 1.0 1.1 2.2 Equivalent Loads MX22 M
