Datasheet Details
- Part number
- AS7C33128PFS18B
- Manufacturer
- Alliance Semiconductor Corporation
- File Size
- 583.53 KB
- Datasheet
- AS7C33128PFS18B_AllianceSemiconductorCorporation.pdf
- Description
- 3.3V 128K x 18 pipeline burst synchronous SRAM
AS7C33128PFS18B Description
December 2004 ® AS7C33128PFS18B 3.3V 128K × 18 pipeline burst synchronous SRAM .
The AS7C33128PFS18B is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 18 bits and.
AS7C33128PFS18B Features
* Organization: 131,072 words × 18 bits
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.0/3.5/4.0 ns
* Fast OE access time: 3.0/3.5/4.0 ns
* Fully synchronous register-to-register operation
* Single-cycle deselect
* Asynchronous o
AS7C33128PFS18B Applications
* Write cycles are performed by disabling the output buffers with OE and asserting a write command. A global write enable GWE writes all 18 bits regardless of the state of individual BW[a:b] inputs. Alternately, when GWE is HIGH, one or more bytes may be written by asserting BWE and the appropriate i
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