The AS7C33128PFS18B is a high performance CMOS 2 Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 18 bits and incorporate a pipeline for highest frequency on any given technology.
Timing for this device is compatible with existing Pentium® synchronous cache sp
AS7C33128PFS18B Features
* Organization: 131,072 words × 18 bits
* Fast clock speeds to 200 MHz
* Fast clock to data access: 3.0/3.5/4.0 ns
* Fast OE access time: 3.0/3.5/4.0 ns
* Fully synchronous register-to-register operation
* Single-cycle deselect
* Asynchronous o
AS7C33128PFS18B_AllianceSemiconductorCorporation.pdf
Datasheet Details
AS7C33128PFS18B
Alliance Semiconductor Corporation
583.53 KB
3.3v 128k x 18 pipeline burst synchronous sram.
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