* JEDEC Standard Compliant
* Power supplies: VDD & VDDQ = +1.35V (1.283V ~ 1.45V)
* Backward compatible to VDD & VDDQ = +1.5V ±0.075V
* Operating temperature: TC = -40~95°C (Industrial)
* Supports JEDEC clock jitter specification
* Fully synchronous operation
* Fast clock
AS4C128M16D3LB-12BIN Datasheet (1.96 MB)
AS4C128M16D3LB-12BIN
Alliance Semiconductor
1.96 MB
2g ddr3l.
AS4C128M16D3LB-12BIN
Revision History 2G DDR3L AS4C128M16D3LB-12BIN 96ball FBGA PACKAGE
Revision Details Rev 1.0 Preliminary datasheet
Date Dec. 20.
📁 Related Datasheet
AS4C128M16D3LB-12BCN Double-data-rate architecture (Alliance Semiconductor)
AS4C128M16D3LA-12BIN 128M x 16 bit DDR3L Synchronous DRAM (Alliance Semiconductor)
AS4C128M16D3A-12BIN 2Gb Double-Data-Rate-3 DRAM (Alliance Semiconductor)
AS4C128M16D3B-12BCN Double-data-rate architecture (Alliance Semiconductor)
AS4C128M16D2A-25BCN 2Gb DDR2 (Alliance Semiconductor)
AS4C128M16D2A-25BIN 2Gb DDR2 (Alliance Semiconductor)
AS4C128M8D2 128M x 8 bit DDRII Synchronous DRAM (Alliance Semiconductor)
AS4C128M8D3 1Gb (128M x 8) bit DDR3 Synchronous DRAM (Alliance Semiconductor)
AS4C128M8D3L 1Gb DDR3L (Alliance Semiconductor)
AS4C1259 256K x 1 DRAM (Austin Semiconductor)
