AS4C128M16D3LC-12BCN, AS4C128M16D3LC-12BIN - 128M x 16 bit DDR3L Synchronous DRAM

Alliance Semiconductor

Datasheet Details

Part number	AS4C128M16D3LC-12BCN, AS4C128M16D3LC-12BIN
Manufacturer	Alliance Semiconductor
File Size	1.76 MB
Description	128M x 16 bit DDR3L Synchronous DRAM
Datasheet	AS4C128M16D3LC-12BIN-AllianceSemiconductor.pdf
Note	This datasheet PDF includes multiple part numbers: AS4C128M16D3LC-12BCN, AS4C128M16D3LC-12BIN. Please refer to the document for exact specifications by model.

Overview.
JEDEC Standard Compliant The 2Gb Double-Data-Rate-3L (DDR3L) DRAMs is.
Power supplies: VDD & VDDQ = +1.35V (1.283V ~ 1.45V) double data rate architecture to achieve high-speed.
Backward compatible to VDD & VDDQ = +1.5V ±0.075V.
Operating temperature: - Commercial : TC = 0~95°C operation. It is internally configured as an eight bank DRAM. The 2Gb chip is organized as 16Mbit x 16 I/Os x 8 bank devices. These synchronous devices achieve high speed - Industrial :.

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Published: Aug 24, 2025 |