AS4C128M16D3LA-12BIN
Alliance Semiconductor
2.18MB
128m x 16 bit ddr3l synchronous dram.
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AS4C128M16D3LB-12BCN - Double-data-rate architecture
(Alliance Semiconductor)
AS4C128M16D3LB-12BCN
Revision History 2Gb AS4C128M16D3LB-12BCN - 96 ball FBGA PACKAGE
Revision Details Rev 1.0 Preliminary datasheet
Date Mar. 2016
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AS4C128M16D3LB-12BIN - 2G DDR3L
(Alliance Semiconductor)
AS4C128M16D3LB-12BIN
Revision History 2G DDR3L AS4C128M16D3LB-12BIN 96ball FBGA PACKAGE
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AS4C128M16D3A-12BIN - 2Gb Double-Data-Rate-3 DRAM
(Alliance Semiconductor)
AS4C128M16D3A-12BIN
Revision History 2Gb AS4C128M16D3A-12BIN - 96 ball FBGA PACKAGE
Revision Details Rev 1.0 Preliminary datasheet
Date May. 2016
A.
AS4C128M16D3B-12BCN - Double-data-rate architecture
(Alliance Semiconductor)
AS4C128M16D3B-12BCN
Revision History 2Gb AS4C128M16D3B-12BCN - 96 ball FBGA PACKAGE
Revision Details Rev 1.0 Preliminary datasheet
Date Mar. 2016
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AS4C128M16D2A-25BCN - 2Gb DDR2
(Alliance Semiconductor)
AS4C128M16D2A-25BCN AS4C128M16D2A-25BIN
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Revision Details Rev 1.0 Preliminary datasheet
Dat.
AS4C128M16D2A-25BIN - 2Gb DDR2
(Alliance Semiconductor)
AS4C128M16D2A-25BCN AS4C128M16D2A-25BIN
Revision History 2Gb AS4C128M16D2A - 84 ball FBGA PACKAGE
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AS4C128M8D2 - 128M x 8 bit DDRII Synchronous DRAM
(Alliance Semiconductor)
AS4C128M8D2
Confidential
128M x 8 bit DDRII Synchronous DRAM (SDRAM)
Advanced (Rev. 1.0, Jun. /2013)
Features
JEDEC Standard Compliant JEDEC st.
AS4C128M8D3 - 1Gb (128M x 8) bit DDR3 Synchronous DRAM
(Alliance Semiconductor)
AS4C128M8D3
REVISION HISTORY
Revision Rev. 1.0 Rev. 2.0
Rev 3.0
Description Initial Issue Typing error – in Table 2 page 2 – incorrect temperature .
AS4C128M8D3L - 1Gb DDR3L
(Alliance Semiconductor)
1Gb DDR3L – AS4C128M8D3L
Revision History AS4C128M8D3L - 78-ball FBGA PACKAGE
Revision Rev 1.0 Rev 2.0
Details Preliminary datasheet Added Backwar.
AS4C1259 - 256K x 1 DRAM
(Austin Semiconductor)
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